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 PD - 90493F
POWER MOSFET THRU-HOLE (TO-254AA)
Product Summary
Part Number
IRFM450
IRFM450 JANTX2N7228 JANTXV2N7228 REF: MIL-PRF-19500/592 500V, N-CHANNEL
HEXFET MOSFET TECHNOLOGY
(R)
RDS(on)
0.415
ID
12A
HEXFET(R) MOSFET technology is the key to International Rectifier's advanced line of power MOSFET transistors. The efficient geometry design achieves very low on-state resistance combined with high transconductance. HEXFET transistors also feature all of the well-established advantages of MOSFETs, such as voltage control, very fast switching, ease of paralleling and electrical parameter temperature stability. They are well-suited for applications such as switching power supplies, motor controls, inverters, choppers, audio amplifiers, high energy pulse circuits, and virtually any application where high reliability is required. The HEXFET transistor's totally isolated package eliminates the need for additional isolating material between the device and the heatsink. This improves thermal efficiency and reduces drain capacitance.
TO-254AA
Features:
n n n n n n
Simple Drive Requirements Ease of Paralleling Hermetically Sealed Electrically Isolated Dynamic dv/dt Rating Light-weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25C ID @ VGS = 10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Lead Temperature Weight For footnotes refer to the last page 12 8.0 48 150 1.2 20 750 12 15 3.5 -55 to 150 300 ( 0.063 in.(1.6mm) from case for 10s) 9.3 (Typical)
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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02/05/02
IRFM450
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS/T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
500 -- -- -- 2.0 6.5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.68 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6.8 2700 600 240 -- -- 0.415 0.515 4.0 -- 25 250 100 -100 120 19 70 35 190 170 130 -- -- -- -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 10V, ID = 8.0A VGS = 10V, ID = 12A VDS = VGS, ID = 250A VDS > 15V, IDS = 8.0A VDS= 400V ,VGS=0V VDS = 400V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS =10V, ID = 12A VDS = 250V VDD = 250V, ID = 12A, VGS =10V, RG = 2.35
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD Ciss C oss C rss
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
nA nC
ns
nH
Measured from drain lead (6mm/0.25in. from package) to source lead (6mm/0.25in. from package)
pF
VGS = 0V, VDS = 25V f = 1.0MHz
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD t rr Q RR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 12 48 1.7 1600 14
Test Conditions
A
V nS C Tj = 25C, IS = 12A, VGS = 0V Tj = 25C, IF = 12A, di/dt 100A/s VDD 50V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC RthJCS RthJA Junction-to-Case Case-to-Sink Junction-to-Ambient
Min Typ Max Units
-- -- -- -- 0.83 0.21 -- -- 48
C/W
Test Conditions
Typical socket mount
Note: Corresponding Spice and Saber models are available on the G&S Website. For footnotes refer to the last page
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IRFM450
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFM450
13
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRFM450
V DS VGS RG
RD
D.U.T.
+
-V DD
10V
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
VDS 90%
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFM450
15V
VDS
L
D R IV E R
RG
20V 1
D .U .T .
IA S tp
+ - VD D
A
0 .01
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D S S tp
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V 0
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRFM450
Footnotes:
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = 50V, starting TJ = 25C, L= 10.4mH Peak IL =12A, VGS = 10V
ISD 12A, di/dt 130A/s, Pulse width 300 s; Duty Cycle 2%
VDD 500V, TJ 150C
Case Outline and Dimensions -- TO-254AA
0.12 [.005] 3.78 [.149] 3.53 [.139] A 13.84 [.545] 13.59 [.535] 6.60 [.260] 6.32 [.249]
3.78 [.149] 3.53 [.139] A 13.84 [.545] 13.59 [.535] 6.60 [.260] 6.32 [.249] 0.12 [.005]
1.27 [.050] 1.02 [.040]
1.27 [.050] 1.02 [.040]
17.40 [.685] 16.89 [.665] 1 2 3
20.32 [.800] 20.07 [.790]
13.84 [.545] 13.59 [.535]
B
22.73 [.895] 21.21 [.835]
17.40 [.685] 16.89 [.665] 1 2 3
20.32 [.800] 20.07 [.790]
13.84 [.545] 13.59 [.535]
B R 1.52 [.060]
C
17.40 [.685] 16.89 [.665]
0.84 [.033] MAX.
4.82 [.190] 3.81 [.150] 3.81 [.150]
4.06 [.160] 3.56 [.140] 3X 1.14 [.045] 0.89 [.035] 0.36 [.014] B A
3X 3.81 [.150] 2X
1.14 [.045] 0.89 [.035] 0.36 [.014] BA
3.81 [.150]
2X
NOTES : 1. 2. 3. 4. DIMENS IONING & TOLERANCING PER AS ME Y14.5M-1994. ALL DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ]. CONTROLLING DIMENS ION: INCH. CONFORMS T O JEDEC OUTLINE TO-254AA.
PIN AS S IGNMENTS 1 = DRAIN 2 = S OURCE 3 = GATE
CAUTION BERYLLIA WARNING PER MIL-PRF-19500 Packages containing beryllia shall not be ground, sandblasted, machined or have other operations performed on them which will produce beryllia or beryllium dust. Furthermore, beryllium oxide packages shall not be placed in acids that will produce fumes containing beryllium.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 02/02
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